Through-Silicon Vias for 3D Integration / Edition 1

by John H. Lau

Overview

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A comprehensive guide to TSV and other enabling technologies for 3D integration

Written by an expert with more than 30 years of experience in the electronics industry, Through-Silicon Vias for 3D Integration provides cutting-edgeinformation on TSV, wafer thinning, thin-wafer handling, microbumping and assembly, and thermal management technologies. Applications to highperformance, high-density, low-power-consumption, wide-bandwidth, and small-form-factor electronic products are discussed.

This book offers a timely summary of progress in all aspects of this fascinating field for professionals active in 3D integration research and development, those who wish to master 3D integration problem-solving methods, and anyone in need of a low-power, wide-bandwidth design and high-yield manufacturing process for interconnect systems.

Coverage includes:

• Nanotechnology and 3D integration for the semiconductor industry
• TSV etching, dielectric-, barrier-, and seed-layer deposition, Cu plating, CMP, and Cu revealing
• TSVs: mechanical, thermal, and electrical behaviors
• Thin-wafer strength measurement
• Wafer thinning and thin-wafer handling
• Microbumping, assembly, and reliability
• Microbump electromigration
• Transient liquid-phase bonding: C2C, C2W, and W2W
• 2.5D IC integration with interposers
• 3D IC integration with interposers
• Thermal management of 3D IC integration
• 3D IC packaging

Product Details

ISBN-13:	9780071785143
Publisher:	McGraw Hill LLC
Publication date:	09/20/2012
Pages:	512
Product dimensions:	6.20(w) x 9.10(h) x 0.80(d)

About the Author

John H. Lau, Ph.D., P.E., IEEE Fellow, ASME Fellow, ITRI Fellow, spent 30 years in the electronics industry (HP and Agilent) in Palo Alto, California, and currently serves as a fellow at the Electronics & Optoelectronics Laboratories, Industrial Technology Research Institute (ITRI), Taiwan. He has published 16 books with McGraw-Hill, including Reliability of RoHS-Compliant 2D and 3D IC Interconnects , Advanced MEMS Packaging, Electronics Manufacturing with Lead-Free Solders and Low Cost Flip Chip Technologies.

Table of Contents

1. Introduction to Microelectronics and Nanoelectronics
2. Origin and Evolution of 3D Integration
3. Trends and Outlook of 3D IC Packaging
4. Through-Silicon Vias (TSVs) Technology
5. Challenges and Outlook of 3D Si Integration
6. Challenges and Outlook of 3D IC Integration
7. Thin-Wafer Strength Measurements
8. Thin-Wafer Handling
9. Low-Cost Microbumping
10. C2C and C2W Bonding with Microbumps
11. Low Temperature Bonding
12. Electromigration of Microbump Assemblies
13. Memory Stacking Methods
14. Active TSV Interposers
15. Passive TSV Interposers
16. Thermal Management of 3D IC Integration
17. 3D IC and CIS Integration
18. 3D IC and MEMS Integration
19. 3D IC and LED Integration
20. Embedded 3D Hybrid IC and Opto-electronic Integration in Organic Substrates