Symbolic Simulation Methods for Industrial Formal Verification / Edition 1

by Robert B. Jones

Overview

Symbolic Simulation Methods for Industrial Formal Verification contains two distinct, but related, approaches to the verification problem. Both are based on symbolic simulation. The first approach is applied at the gate level and has been successful in verifying sub-circuits of industrial microprocessors with tens and even hundreds of thousands of gates. The second approach is applied at a high-level of abstraction and is used for high-level descriptions of designs.

The book contains three main topics:

• Self consistency, a technique for deriving a formal specification of design behavior from the design itself;
• The use of the parametric representation to encode predicates as functional vectors for symbolic simulation, an important step in addressing the state-explosion problem;
• Incremental flushing, a method used to verify high-level descriptions of out-of-order execution.
Symbolic Simulation Methods for Industrial Formal Verification concludes with work on verification of simplified models of out-of-order processors.

Product Details

ISBN-13:	9781402071034
Publisher:	Springer US
Publication date:	06/30/2002
Edition description:	2002
Pages:	151
Product dimensions:	6.10(w) x 9.25(h) x 0.36(d)

Table of Contents

1. Introduction.- 1.1 Motivation and Philosophy.- 1.2 Approach.- 1.3 Verification Realities.- 1.4 Introduction to Symbolic Simulation.- 1.5 Other Approaches.- 1.6 Scope of the Book.- 1.7 Outline.- I Self Consistency.- 2. Self Consistency.- 3. Self Consistency in Practice.- II Parametric Representations.- 4. The Parametric Representation.- 5. Using the Parametric Representation.- III Incremental Flushing.- 6. Background on Processor Verification.- 7. Incremental Flushing.- 8. Conclusions.- Appendices.- Proofs.- A.l Proof of Theorem 3.- A.2 Proof of Theorem 5.- A.3 Statement and Proof of Lemma 1.- A.4 Proof of Theorem 8.

Editorial Reviews

As the problem of buggy computer hardware increases faster than other innovations of design, the solution has been to beef up conventional approaches to formal verification, which entails exhaustive analysis of some aspect of design behavior. Jones, an electrical engineer at Intel, suggests symbolic simulation as a highly effective and somewhat neglected alternative. He admits that the approach does have computational limits, but says they are not as severe in practice as formal verification, and can be used so that performance degrades gracefully rather than hitting hard limits. He emphasizes new ways to use symbolic simulation to verify and debug complex hardware systems. Annotation c. Book News, Inc., Portland, OR