Failure-Free Integrated Circuit Packages: Systematic Elimination of Failures / Edition 1

Failure-Free Integrated Circuit Packages: Systematic Elimination of Failures / Edition 1

by Charles A. Harper, Charles Cohn
ISBN-10:
0071434844
ISBN-13:
9780071434843
Pub. Date:
07/27/2004
Publisher:
McGraw Hill LLC
ISBN-10:
0071434844
ISBN-13:
9780071434843
Pub. Date:
07/27/2004
Publisher:
McGraw Hill LLC
Failure-Free Integrated Circuit Packages: Systematic Elimination of Failures / Edition 1

Failure-Free Integrated Circuit Packages: Systematic Elimination of Failures / Edition 1

by Charles A. Harper, Charles Cohn

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Overview

Publisher's Note: Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product.





SPOT, STOP, AND ANALYZE IC DEVICE FAILURE WITH THIS UNIQUE ILLUSTRATED GUIDE

Worth more than a thousand words, each illustration in Failure- Free Integrated Circuit Packages gives you a visual reference on common failure modes of IC devices in organic packages. In addition, the wide knowledge base of the chapter authors provides you with proven, leading-edge failure analysis techniques.

Failure-Free Integrated Circuit Packages helps you:

* Find, identify, and correct potential failures before they occur
* Improve device reliability
* Learn from case studies of IC package failure modes
* Quickly locate failures through visual comparisons
* Apply state-of-the-art failure analysis techniques
* Comprehend the physics behind the failure mechanism
* Understand the limitations of reliability testing and lifetime estimation

INSIDE, YOU’LL FIND A PRACTICAL AND EASY WAY TO APPROACH FAILURE ANALYSIS OF ICs IN ORGANIC PACKAGES. AREAS COVERED INCLUDE:
Fundamentals of IC package technologies
Reliability
Physics and chemistry of failures in packaged devices
Strategies for locating failures
Failure analysis techniques
Failure modes common in organic IC packages
Emerging assembly materials for IC packaging


Product Details

ISBN-13: 9780071434843
Publisher: McGraw Hill LLC
Publication date: 07/27/2004
Series: Professional Engineering Ser.
Pages: 366
Product dimensions: 6.20(w) x 9.10(h) x 1.30(d)

About the Author

Charles A. Harper is president of Technology Seminars, Inc., an organization devoted to presenting seminars on electronic packaging and related subjects to the electronics industry. He is a graduate of The John Hopkins University School of Engineering , Baltimore, MD., and a past member of the engineering faculty of The Johns Hopkins University. He is active in numerous professional societies, including the International Microelectronics and Packaging Society (of which he is a past president), the National Electronic Packaging Conference (NEPCON), and the Institute of Electrical and Electronics Engineers. He is series editor of McGraw-Hill's Electronic Packaging and Interconnection Technology Series and a member of the Editorial Advisory Board of Electronic Packaging and Production magazine.

Charles Cohn is a Distinguished Member of Technical Staff in the IC Packaging and Interconnection Organization at Agere Systems. He has been with AT&T /Lucent/Agere for 21 years, and is currently lead technologist for Agere’s operations in this field. He has conducts many seminars in advanced IC packaging and interconnection, the U.S. and overseas, and has been awarded ten US patents

Table of Contents

Forewordvii
Prefacexi
About the Contributorsxiii
Chapter 1Introduction1
1.1Overview1
1.2More about the IC Package5
1.3Multiple Technologies/Multiple Failure Mechanisms8
1.4References16
Chapter 2Fundamentals of IC Package Technologies17
2.1The IC Package17
2.2Package Families19
2.2.1Through-Hole Mounted Packages20
2.2.2Surface Mounted Packages23
2.3Package Technologies26
2.3.1Molded Plastic Technology27
2.3.2Pressed Ceramic (Glass-Sealed Refractory) Technology30
2.3.3Cofired Laminated Ceramic Technology32
2.3.4Laminated Plastic Technology39
2.4Comparison of Package Technologies56
2.5Summary and Future Trends58
2.6References62
Chapter 3Device Reliability65
3.1What is Reliability?65
3.2Accelerated Aging67
3.3Failure Mode and Effects Analysis69
3.4The Kinetics of Degradation70
3.5Hazard Rates80
3.6Common Mathematical Functions Used for Estimating Reliability82
3.7Cost of Reliability84
3.8References85
Chapter 4Physics and Chemistry of Failures in Packaged Devices87
4.1Introduction87
4.2Mass Transport Effects88
4.2.1Solid-State Reactions88
4.2.2Liquid-State Reactions96
4.2.3Electromigration100
4.3Thermal Mismatch Effects102
4.4Humidity Effects111
4.5References113
Chapter 5Strategies for Locating Failures115
5.1Interpreting Electrical Test Results115
5.2Using Package Design Files as Failure Roadmaps116
5.2.1Introduction to Package Design File Structures117
5.2.2Wirebond Diagrams117
5.2.3Flip Chip Bump Maps119
5.2.4Package Design Files120
5.2.5Package Net Lists123
5.3Automated Test Equipment Failure Error Logs: Starting with the Failure Data124
5.4Test Vehicle Design with Improved Fault Isolation Capabilities125
5.4.1Issues with Fault Isolation Using Production Packaged Devices127
5.4.2Cost of Doing Package Evaluations on Production Devices127
5.4.3Benefits of Simplified Opens and Shorts Testing for Quick Evaluation of New Packaging127
5.4.4Generating Opens and Shorts Testers in Production Devices128
5.4.5Single-Metal-Level Silicon Die as Drop in Opens and Shorts Testers128
5.5Case Study No. 1: Finite Element Analysis to Help Identify Root Causes130
5.5.1Package Information131
5.5.2FEA Modeling Considerations133
5.5.3Simulation Results136
5.5.4Discussion137
5.6Case Study No. 2: Large Die Flip Chip Test Vehicle141
5.6.1Test Vehicle Description142
5.6.2Reliability Testing Program146
5.6.3Design of Experiment Descriptions149
5.6.4Failure Analysis Approach150
5.6.5Finite Element Analysis Approach150
5.6.6Results and Discussion151
5.6.7Concluding Remarks166
5.7Case Study No. 3: Multichip Plastic BGA168
5.7.1Device Description169
5.7.2Reliability Test Program171
5.7.3Finite Element Analysis180
5.7.4Design Of Experiment184
5.7.5Concluding Remarks185
5.8Conclusion185
5.9References186
Chapter 6Failure Analysis Techniques187
6.1Imaging Techniques187
6.1.1Optical Microscopy188
6.1.2Real-Time X-Ray Analysis189
6.1.3Scanning Acoustic Microscopy191
6.1.4Thermal Imaging197
6.1.5Scanning Electron Microscopy201
6.1.6Transmission Electron Microscopy204
6.1.7Focused Ion Beam208
6.1.8Moire Interferometry211
6.1.9Shadow Moire213
6.1.10Scanning Superconducting Quantum Interference Device Microscopy215
6.1.11Dye Penetrant Leak Detection218
6.2Analytical Techniques222
6.2.1Energy Dispersive Spectroscopy223
6.2.2Auger Electron Spectroscopy227
6.2.3X-Ray Photoelectron Spectroscopy229
6.2.4Fourier Transform Infrared Spectroscopy230
6.2.5Wetting Balance Solderability Test233
6.3Electrical Techniques234
6.3.1DC Electrical Characterization234
6.3.2Time Domain Reflectometry236
6.4Destructive Techniques240
6.4.1Package Decapsulation Techniques240
6.4.2Mechanical Polish Techniques243
6.4.3Dry Etching for Package FA248
6.4.4Wirebond Pull and Shear251
6.5References254
Chapter 7Examples of Failure Modes Common in Organic IC Packages257
7.1Introduction257
7.2Failures in Dual In-Line Packages258
7.2.1Open Contacts--Lifted Ball Bonds258
7.3Failures in Quad Flat Packs259
7.3.1Open Contacts--Sheared Ball Bonds259
7.3.2Open Contacts--Sheared Ball Bonds262
7.3.3Opens and Shorts--Intermetallic Growth263
7.3.4Shorted Leads--Foreign Material between Leads264
7.3.5Shorted Leads--Foreign Material between Leads266
7.4Failures in Plastic Ball Grid Array Packages269
7.4.1Open Contact--Via Barrel Cracking269
7.4.2Open Contacts--Cracked Signal Traces in Substrate272
7.4.3Open Contacts--Via Knee Cracking272
7.4.4Open Contacts--Lifted Wedge Bonds277
7.4.5Open Contact--Cracked Via Barrel281
7.4.6Open Contact--Cracked Signal Trace in Substrate282
7.4.7Open Contact--Lifted Ball Bonds283
7.4.8Open Contact--Broken Bond Wire286
7.4.9Open Contact--Cracked Die287
7.4.10Shorted Contacts--Die Attach Material on Exposed Cu288
7.5Failures in Matrix Ball Grid Array Packages292
7.5.1Open Contact--Via Knee Cracking292
7.5.2Substrate Opens--Cracked Signal Trace in Substrate293
7.6Failures in Plastic BGA Multichip Modules295
7.6.1Intermittent Open Contacts--Cracked Signal Traces295
7.6.2Open Contacts--Cracked Signal Traces296
7.6.3Functional--Dendritic Growth298
7.6.4Shorted Contacts--Die Attach Material on Exposed Cu302
7.7Failures in Plastic Enhanced Ball Grid Array, Cavity-Down Packages302
7.7.1Open Contacts--Broken Bond Wires302
7.7.2Open Contacts--Sheared Ball Bonds/Damaged Signal Traces305
7.8Failures in Plastic Flip Chip Ball Grid Array Packages305
7.8.1Open Contacts--Cracks around FC Bump Pads305
7.8.2Open Contacts--Cracks around BGA Pads309
7.8.3Open Contacts--Flip Chip Bump Cracking315
7.8.4Open Contact--Incomplete Via Shape317
7.8.5Shorted Contacts--Vertical Deformation of Signal Trace319
7.8.6Shorted Contact--In-Plane Cu Bridge321
Chapter 8Emerging Assembly Materials for IC Packaging325
8.1Introduction325
8.2Lead-Free-Compatible Assembly Materials326
8.2.1Characteristics Specific to Lead-Free Materials326
8.2.2Lead-Free-Compatible Mold Compounds329
8.2.3Lead-Free-Compatible Die Attach348
8.3Concluding Remarks352
8.4References353
Index355
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