CMOS VLSI Engineering: Silicon-on-Insulator (SOI) / Edition 1

by James B. Kuo, Ker-Wei Su

Overview

Silicon-On-Insulator (SOI) CMOS technology has been regarded as another major technology for VLSI in addition to bulk CMOS technology. Owing to the buried oxide structure, SOI technology offers superior CMOS devices with higher speed, high density, and reduced second order effects for deep-submicron low-voltage, low-power VLSI circuits applications. In addition to VLSI applications, and because of its outstanding properties, SOI technology has been used to realize communication circuits, microwave devices, BICMOS devices, and even fiber optics applications.
CMOS VLSI Engineering: Silicon-On-Insulator addresses three key factors in engineering SOI CMOS VLSI - processing technology, device modelling, and circuit designs are all covered with their mutual interactions. Starting from the SOI CMOS processing technology and the SOI CMOS digital and analog circuits, behaviors of the SOI CMOS devices are presented, followed by a CAD program, ST-SPICE, which incorporates models for deep-submicron fully-depleted mesa-isolated SOI CMOS devices and special purpose SOI devices including polysilicon TFTs.
CMOS VLSI Engineering: Silicon-On-Insulator is written for undergraduate senior students and first-year graduate students interested in CMOS VLSI. It will also be suitable for electrical engineering professionals interested in microelectronics.

Product Details

ISBN-13:	9780792382720
Publisher:	Springer US
Publication date:	09/30/1998
Edition description:	1998
Pages:	422
Product dimensions:	6.10(w) x 9.25(h) x 0.04(d)

Table of Contents

1 Introduction.- 2 SOI CMOS Technology.- 3 SOI CMOS Circuits.- 4 SOI CMOS Devices—Basic.- 5 SOI CMOS Devices—Advanced.- 6 SOI-Technology ST-SPICE.- 7 Special-Purpose SOI.

Editorial Reviews

Owing to the buried oxide structure, SOI technology offers superior CMOS devices with higher speed, high density, and reduced second order effects for deep-submicron low-voltage, low-power VLSI circuits applications. Kuo and Su (electrical engineering, National Taiwan University) address three key factors in engineering SOI CMOS VLSI<-->processing technology, device modeling, and circuit design<-->and their mutual interactions. Starting from the SOI CMOS processing technology and the SIO CMOS digital and analog circuits, behaviors of the SOI CMOS devices are presented, followed by a CAD program (ST-SPICE) which incorporates models for deep- submicron fully-depleted mesa-isolated SOI CMOS devices and special purpose SOI devices including polysilicon TFTs. Annotation c. by Book News, Inc., Portland, Or.

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