Ulsi Front-end Technology: Covering From The First Semiconductor Paper To Cmos Finfet Technology

Ulsi Front-end Technology: Covering From The First Semiconductor Paper To Cmos Finfet Technology

by Wai Shing Lau
ISBN-10:
9813222158
ISBN-13:
9789813222151
Pub. Date:
10/13/2017
Publisher:
World Scientific Publishing Company, Incorporated
ISBN-10:
9813222158
ISBN-13:
9789813222151
Pub. Date:
10/13/2017
Publisher:
World Scientific Publishing Company, Incorporated
Ulsi Front-end Technology: Covering From The First Semiconductor Paper To Cmos Finfet Technology

Ulsi Front-end Technology: Covering From The First Semiconductor Paper To Cmos Finfet Technology

by Wai Shing Lau
$89.0
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Overview

The main focus of this book is ULSI front-end technology. It covers from the early history of semiconductor science & technology from 1874 to state-of-the-art FINFET technology in 2016. Some ULSI back-end technology is also covered, for example, the science and technology of MIM capacitors for analog CMOS has been included in this book.

Product Details

ISBN-13: 9789813222151
Publisher: World Scientific Publishing Company, Incorporated
Publication date: 10/13/2017
Pages: 248
Product dimensions: 6.00(w) x 9.10(h) x 0.80(d)

Table of Contents

Preface ix

Author Biography xi

Chapter 1 Introduction to the History of Semiconductors 1

1.1 Early History of Semiconductors 1

1.2 Invention of the p-n Junction 13

1.3 Invention of the Transistor 15

1.4 Invention of the Integrated Circuit 17

1.5 History of Semiconductor Physics 24

1.6 History of Semiconductor Crystal Growth Technology 28

1.7 Semiconductor Science and Technology in the 21st Century 31

References 34

Chapter 2 History of MOS Technology 45

2.1 History of the Invention of the MOS Transistor 45

2.2 Control of the Threshold Voltage and the Threshold Adjust Implant 49

2.3 Invention of CMOS 51

2.4 Invention of the Silicon Gate Process 53

2.4.1 Migration from metal gate to silicon gate 53

2.4.2 Back to metal gate 58

2.5 Isolation Technology 60

2.6 Drain/Source Engineering 62

2.7 Well Engineering 66

2.8 Technology After MOS Transistor Formation 67

2.9 FinFET 70

2.10 Reliability 71

References 72

Chapter 3 CMOS Switching Speed Characterization and An Overview Regarding How to Speed Up CMOS 79

3.1 Introduction of Switching Speed 79

3.2 Measurement of Switching Speed 79

3.2.1 Method 1: Ring oscillator method 79

3.2.2 Method 2: Cascading many logic gates together 81

3.3 Basic Theory Regarding How to Get Better Switching Speed of CMOS 82

3.3.1 Increase drive current 82

3.3.2 Decrease parasitic capacitance 95

3.4 CMOS Technology Improvement by Mobility Improvement of Silicon 96

3.4.1 Faster CMOS by operation at lower temperature 98

3.4.2 Faster CMOS by changing device channel direction or Si crystal orientation 104

3.4.3 Faster CMOS by applying mechanical stress to silicon 111

3.5 CMOS Technology Improvement by Reduction of Parasitic Capacitance 116

3.5.1 Front-end techniques used to reduce parasitic capacitance 116

3.5.1.1 Drain/source engineering 116

3.5.1.2 Gate engineering and well/channel engineering 117

3.5.1.3 SOI technology 119

3.5.2 Back-end techniques used to reduce parasitic capacitance 120

3.6 CMOS Technology Improvement by Using High-k Dielectric and Metal Gate 124

3.7 CMOS Technology Improvement by Using 3-D Device Structure Like FINFET 128

3.8 CMOS Technology Improvement by Using Materials with Higher Mobility than Silicon 130

3.9 CMOS Technology Improvement by Reducing Parasitic Resistance 136

3.10 BiCMOS Technology 138

References 138

Chapter 4 Low Power CMOS Engineering 147

4.1 Introduction to Low-power CMOS Engineering 147

4.2 Power Dissipation in CMOS 149

4.3 Reduction of Dynamic Power Dissipation 150

4.4 Reduction of Static Power Dissipation 156

4.4.1 Reduction of junction leakage current 158

4.4.2 Reduction of subthreshold leakage current (part one) 159

4.4.3 Reduction of GIDL 163

4.4.4 Reduction of subthreshold leakage current (part two) 170

4.4.5 Reduction of gate leakage current by high-k dielectric technology 175

4.4.6 Reduction of subthreshold leakage current by UTB SOI technology 178

4.4.7 Reduction of subthreshold leakage current by FINFET technology 178

4.4.8 Reduction of power dissipation by mechanical switch technology 181

4.5 Control of the Spread of the Threshold Voltage 182

4.6 Conclusion of this Chapter 184

References 185

Chapter 5 Analog CMOS Technology 193

5.1 Low Frequency Analog CMOS 193

5.1.1 Significance of the Early voltage 193

5.1.2 Significance of transistor matching 200

5.2 High Frequency Analog CMOS 205

5.2.1 Low noise RF amplifier 205

5.2.2 Inductor design 207

5.3 Through Silicon Via 208

5.4 MIM Capacitors for Analog CMOS 209

5.5 Mixed Signal CMOS 226

References 226

Index 233

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