This book provides readers with an insightful guide to the design, testing and optimization of 2.5D integrated circuits. The authors describe a set of design-for-test methods to address various challenges posed by the new generation of 2.5D ICs, including pre-bond testing of the silicon interposer, at-speed interconnect testing, built-in self-test architecture, extest scheduling, and a programmable method for low-power scan shift in SoC dies. This book covers many testing techniques that have already been used in mainstream semiconductor companies. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 2.5D ICs a reality and commercially viable.
This book provides readers with an insightful guide to the design, testing and optimization of 2.5D integrated circuits. The authors describe a set of design-for-test methods to address various challenges posed by the new generation of 2.5D ICs, including pre-bond testing of the silicon interposer, at-speed interconnect testing, built-in self-test architecture, extest scheduling, and a programmable method for low-power scan shift in SoC dies. This book covers many testing techniques that have already been used in mainstream semiconductor companies. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 2.5D ICs a reality and commercially viable.
![Testing of Interposer-Based 2.5D Integrated Circuits](http://img.images-bn.com/static/redesign/srcs/images/grey-box.png?v11.10.4)
Testing of Interposer-Based 2.5D Integrated Circuits
182![Testing of Interposer-Based 2.5D Integrated Circuits](http://img.images-bn.com/static/redesign/srcs/images/grey-box.png?v11.10.4)
Testing of Interposer-Based 2.5D Integrated Circuits
182eBook(1st ed. 2017)
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Product Details
ISBN-13: | 9783319547145 |
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Publisher: | Springer-Verlag New York, LLC |
Publication date: | 03/20/2017 |
Sold by: | Barnes & Noble |
Format: | eBook |
Pages: | 182 |
File size: | 5 MB |