Silicon-on-Insulator Technology: Materials to VLSI: Materials to VLSI / Edition 3

by J.-P. Colinge

Overview

Silicon-on-Insulator Technology: Materials to VLSI, Third Edition, retraces the evolution of SOI materials, devices and circuits over a period of roughly twenty years. Twenty years of progress, research and development during which SOI material fabrication techniques have been born and abandoned, devices have been invented and forgotten, but, most importantly, twenty years during which SOI Technology has little by little proven it could outperform bulk silicon in every possible way. The turn of the century turned out to be a milestone for the semiconductor industry, as high-quality SOI wafers suddenly became available in large quantities. From then on, it took only a few years to witness the use of SOI technology in a wealth of applications ranging from audio amplifiers and wristwatches to 64-bit microprocessors.

This book presents a complete and state-of-the-art review of SOI materials, devices and circuits. SOI fabrication and characterization techniques, SOI CMOS processing, and the physics of the SOI MOSFET receive an in-depth analysis.

Product Details

ISBN-13:	9781402077739
Publisher:	Springer US
Publication date:	02/29/2004
Edition description:	3rd ed. 2004
Pages:	366
Product dimensions:	6.10(w) x 9.25(h) x 0.36(d)

Table of Contents

1 Introduction.- 2 SOI Materials.- 2.1 Introduction.- 2.2 Heteroepitaxial techniques.- 2.3 Dielectric Isolation (DI).- 2.4 Polysilicon melting and recrystallization.- 2.5 Homoepitaxial techniques.- 2.6 FIPOS.- 2.7 Ion beam synthesis of a buried insulator.- 2.8 Wafer Bonding and Etch Back (BESOI).- 2.9 Layer transfer techniques.- 2.10 Strained silicon on insulator (SSOI).- 2.11 Silicon on diamond.- 2.12 Silicon-on-nothing (SON).- 3 SOI Materials Characterization.- 3.1 Introduction.- 3.2 Film thickness measurement.- 3.3 Crystal quality.- 3.4 Carrier lifetime.- 3.5 Silicon/Insulator interfaces.- 4 SOI CMOS Technology.- 4.1 SOI CMOS processing.- 4.2 Field isolation.- 4.3 Channel doping profile.- 4.4 Source and drain engineering.- 4.5 Gate stack.- 4.6 SOI MOSFET layout.- 4.7 SOI-bulk CMOS design comparison.- 4.8 ESD protection.- 5 The SOI MOSFET.- 5.1 Capacitances.- 5.2 Fully and partially depleted devices.- 5.3 Threshold voltage.- 5.4 Current-voltage characteristics.- 5.5 Transconductance.- 5.6 Basic parameter extraction.- 5.7 Subthreshold slope.- 5.8 Ultra-thin SOI MOSFETs.- 5.9 Impact ionization and high-field effects.- 5.10 Floating-body and parasitic BJT effects.- 5.11 Self heating.- 5.12 Accumulation-mode MOSFET.- 5.13 Unified body-effect representation.- 5.14 RF MOSFETs.- 5.15 CAD models for SOI MOSFETs.- 6 Other SOI Devices.- 6.1 Multiple-gate SOI MOSFETs.- 6.2 MTCMOS/DTMOS.- 6.3 High-voltage devices.- 6.4 Junction Field-Effect Transistor.- 6.5 Lubistor.- 6.6 Bipolar junction transistors.- 6.7 Photodiodes.- 6.8 G4 FET.- 6.9 Quantum-effect devices.- 7 The SOI MOSFET in a Harsh Environment.- 7.1 Ionizing radiations.- 7.2 High-temperature operation.- 8 SOI Circuits.- 8.1 Introduction.- 8.2 Mainstream CMOS applications.- 8.3 Niche applications.- 8.4 Three-dimensional integration.

Editorial Reviews

Following an introduction which briefly describes some advantages of SOI technology, such as the absence of latchup in CMOS structures and the reduction of parasitic source and drain capacitances, chapters cover the different approaches for producing SOI materials (and issues of material quality); characterization techniques; the basics of SOI CMOS processing; the physics of the SOI MOSFET; other types of devices fabricated on SOI substrates; the performances of SOI devices operating in a harsh environment (high temperature or radiations); and the performance of modern SOI circuits, such as low-voltage, low-power CMOS, rad-hard, high-temperature, RAM and smart-power circuits. Annotation c. by Book News, Inc., Portland, Or.

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