RISC Microprocessors, History and Overview
This book discusses the Reduced Instruction Set Computer architecture, a technique to streamline instruction execution. Sometimes, RISC is said to stand for "Relegate Important Stuff to the Compiler," since the compilation process is done offline, and then the code is run. The time penalty paid at compile time is paid back by faster code execution. RISC machines place more burdens on their compilers. The alternative to RISC is CISC – Complex Instruction Set Computer. An example would be the legacy Intel x86, IA-32 instruction set. RISC involves a series of architectural features to enhance the throughput of operations. RISC has become a mainstream architectural feature in modern processors. Glossary and list of references is included.
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RISC Microprocessors, History and Overview
This book discusses the Reduced Instruction Set Computer architecture, a technique to streamline instruction execution. Sometimes, RISC is said to stand for "Relegate Important Stuff to the Compiler," since the compilation process is done offline, and then the code is run. The time penalty paid at compile time is paid back by faster code execution. RISC machines place more burdens on their compilers. The alternative to RISC is CISC – Complex Instruction Set Computer. An example would be the legacy Intel x86, IA-32 instruction set. RISC involves a series of architectural features to enhance the throughput of operations. RISC has become a mainstream architectural feature in modern processors. Glossary and list of references is included.
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RISC Microprocessors, History and Overview

RISC Microprocessors, History and Overview

by Patrick Stakem
RISC Microprocessors, History and Overview

RISC Microprocessors, History and Overview

by Patrick Stakem

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Overview

This book discusses the Reduced Instruction Set Computer architecture, a technique to streamline instruction execution. Sometimes, RISC is said to stand for "Relegate Important Stuff to the Compiler," since the compilation process is done offline, and then the code is run. The time penalty paid at compile time is paid back by faster code execution. RISC machines place more burdens on their compilers. The alternative to RISC is CISC – Complex Instruction Set Computer. An example would be the legacy Intel x86, IA-32 instruction set. RISC involves a series of architectural features to enhance the throughput of operations. RISC has become a mainstream architectural feature in modern processors. Glossary and list of references is included.

Product Details

BN ID: 2940148831709
Publisher: PRRB Publishing
Publication date: 10/30/2013
Sold by: Barnes & Noble
Format: eBook
Pages: 63
File size: 920 KB

About the Author

The author developed and taught a RISC computer architecture course at Loyola University. He currently teaches Embedded Systems at the Johns Hopkins University.
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