Architecture Design for Soft Errors provides a comprehensive description of the architectural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them.
To provide readers with a better grasp of the broader problem definition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques. There are a number of different ways this book can be read or used in a course: as a complete course on architecture design for soft errors covering the entire book; a short course on architecture design for soft errors; and as a reference book on classical fault-tolerant machines.
This book is recommended for practitioners in semi-conductor industry, researchers and developers in computer architecture, advanced graduate seminar courses on soft errors, and (iv) as a reference book for undergraduate courses in computer architecture.
- Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors
- Shows readers how to quantify their soft error reliability
- Provides state-of-the-art techniques to protect against soft errors
Architecture Design for Soft Errors provides a comprehensive description of the architectural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them.
To provide readers with a better grasp of the broader problem definition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques. There are a number of different ways this book can be read or used in a course: as a complete course on architecture design for soft errors covering the entire book; a short course on architecture design for soft errors; and as a reference book on classical fault-tolerant machines.
This book is recommended for practitioners in semi-conductor industry, researchers and developers in computer architecture, advanced graduate seminar courses on soft errors, and (iv) as a reference book for undergraduate courses in computer architecture.
- Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors
- Shows readers how to quantify their soft error reliability
- Provides state-of-the-art techniques to protect against soft errors
![Architecture Design for Soft Errors](http://img.images-bn.com/static/redesign/srcs/images/grey-box.png?v11.10.4)
Architecture Design for Soft Errors
360![Architecture Design for Soft Errors](http://img.images-bn.com/static/redesign/srcs/images/grey-box.png?v11.10.4)
Architecture Design for Soft Errors
360eBook
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Product Details
ISBN-13: | 9780080558325 |
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Publisher: | Elsevier Science |
Publication date: | 08/29/2011 |
Sold by: | Barnes & Noble |
Format: | eBook |
Pages: | 360 |
File size: | 7 MB |